Changelog

2026-06-19

• Every finding is now reachable — and Sparky can explain any of them. A warning you can't click to find reads like a phantom bug, so findings that point at a board edge (a signal-integrity or isolation rule declared on a connector pin) now locate the connector itself instead of greying out the button. And every error and warning grew a one-click '✨ ask' — it hands Sparky the exact finding, its reasoning, and the block it points at, so 'why is this flagged and how do I fix it' is one click from the problem.
• Signal-integrity check sharpened on real off-board buses. The I2C rise-time check now fires when the bus is declared on a connector pin (a header running I2C off the board), and counts those connector pins toward the bus capacitance — so the rise-time it prints is the number you'd get by hand, on the bus you actually drew. Companion to the RS-485 termination fix; both close the gap where a check went quiet exactly when the signal left the board.
• Sparky and the Pro analyses are easier to find. A one-time intro now points new users at Sparky — ask it to add a part, check a net, or build a block, and watch it reason about your actual design. And signal-integrity & isolation analysis now have a home in the editor toolbar, not just a right-click away.
• Share a design with a card that shows it off. Paste a public design's link into social, chat, or a forum and it unfurls as its own card — the design's name, block count, and live check status, not a generic logo. And when your checks pass, the Share menu offers a one-click way to publish it so others can open a copy and learn from it.
• The checker stopped crying wolf on paralleled supplies — and 'Saved' tells the truth. Two sources feeding one rail (a supply plus a backup, or paralleled regulators) now ADD their current capability instead of being rated by just the first one, so a working board no longer shows a phantom over-budget error. And the save indicator now reflects your account, not just this browser: if a save can't reach your account (e.g. you're past the saved-design limit), it says 'Not saved to your account' instead of a checkmark that isn't true.
• Sparky is honest about AI-authored pinouts. When Sparky wires up a chip from its part number, it now flags that the pin map is exactly as it provided and to verify it against the datasheet before ordering or fabbing — and it refuses an unknown part type outright instead of quietly guessing one, so a part can't be wired with the wrong role.
• The Problems panel stays focused on what matters. Optional suggestions (add a test point, a source rated bigger than its load, a connector with room to spare) are now tucked behind a 'show suggestions' toggle, so real errors and warnings never get buried in take-it-or-leave-it advice. Version history moved into the ⋯ menu to keep the toolbar tidy.
• New check: missing decoupling capacitor. Electrace now flags an IC whose supply pin has no decoupling capacitor to ground anywhere on its rail — the single most common real-world hardware mistake, and the classic cause of flaky, can't-reproduce-it behavior. You'll find it under 'show suggestions' in the Problems panel, and it stays quiet whenever a bypass cap is already present, so it never nags a board that's properly decoupled.
• Cleaner KiCad netlist export. A design with a connector (USB, a barrel jack, a header) now exports a .net that KiCad imports without phantom-component warnings — every connector gets a real component entry instead of dangling as a reference with nothing behind it. The 'no lock-in, leave any time' export just got more honest.

2026-06-15

• Try Sparky free. The AI engineer is no longer Pro-only — every signed-in account now gets a monthly free preview of Sparky. Ask it to read your design, run the checks, explain a net, or rough out a block, and watch it reason about your actual circuit (not a guess) before you decide to upgrade. Pro unlocks the full assistant; the preview is there so you can feel what it does first. Your designs and the whole checking engine stay free, as always.

2026-06-13

• The full schematic prints like a real drawing. The whole-design schematic sheet now reads the way an EDA tool prints one: a border around the page and a proper title block in the bottom-right — design name, author, date, revision, block count, sheet number. Each block's region sits on the page as a framed drawing with honest spacing between them, and every label and port flag stays inside its own frame instead of spilling past the edge. The view itself now presents the sheet as a page on a desk — so 'Download SVG' hands you something you'd actually put in a handoff package.
• 'Send to Digi-Key' only sends what's actually orderable. A connector (RJ45, USB-C, a header) or a generic placeholder part (a block that just says 'p-fet') has no single orderable part number — and sending one poisoned the whole list, so the cart failed for any design that had one. Now those rows are kept out of the one-click cart (they still carry a working 'buy ↗' search and stay in the CSV), and the button only lights up for the parts that declare a real part number. The cart push you get is one Digi-Key accepts.
• And Sparky can fill the gaps — for real. When the cart is empty because rows don't name a specific part yet, the BOM panel now says so plainly — the one-click cart needs an exact part number, but every row's 'buy ↗' search still works — and offers a one-click '✨ Fill part numbers' that hands the list to Sparky to choose real, in-stock Digi-Key parts that match each one's value and footprint. Sparky now has the tool to actually set those part numbers on your parts (and confirms each one landed before reporting back), so a value-only sketch becomes an orderable cart without leaving the editor. Library connectors don't take a part number yet, so for those Sparky hands you the right one to add by hand.

2026-06-12

• New block: LED Color Sensor. Three ordinary LEDs mounted backwards on purpose — because every LED is secretly a wavelength-selective photodiode that sees its own color best. The block carries the whole Mims technique in its part explanations: reverse-charge the junction from a GPIO, time the photocurrent decay, no ADC needed. Red sees red, green sees green, blue sees blue — a real color fingerprint for pennies, with its honest limits stated. Paired glossary entry: photovoltaic mode.
• LEDs now glow with their real brightness. The schematic sheet renders every LED's luminance from the DC solve — actual forward current, actual declared color, glow scaled to a typical 15 mA indicator. It's the math, not decoration: an LED starved to 0.3 mA through a pull-up shows the faint halo it would really have on the bench, a dead LED shows nothing (which is the finding), and hovering reads the exact milliamps. The first feature where the solver is something you can SEE.
• Cross-device fit and finish. Designs from the earliest local-only days now ride along when you sign in on a new machine (the sync sweep finds them even without their old index entry), onboarding no longer replays on every fresh device (it waits for your account data to arrive before deciding you're new), and the editor toolbar consolidated its long tail into a ⋯ menu — one tidy row with Import/Export/Schematic/Reset tucked inside.
• Deletes stay deleted, and the editor learned its own name. Deleting a project now plants a durable tombstone, so a quick refresh (or flaky connection) can never resurrect it from the cloud copy — the delete intent survives until the server confirms. The design name now lives in the editor toolbar: click it to rename, any time, no prompt required. And the toolbar wraps gracefully instead of colliding with the sandbox banner, while the tutorial hints moved clear of the canvas helper text.
• Pricing page honesty pass. The $9 early-adopter price now shows against the planned $15 — crossed out, with the promise in writing: early adopters keep $9 for life. And three things our architecture lets us promise that metered tools can't, now stated plainly: analysis is unlimited on every plan because it runs on YOUR machine (we couldn't meter it if we wanted to), answers arrive in milliseconds with no simulation roulette, and your design never leaves your browser until you choose to sync it.
• Bode plots, in the editor. The new AC button opens the frequency-response dialog: pick any two points of your design and see the real H(jω) — magnitude and phase across 1 Hz–10 MHz, with the −3 dB corner computed exactly (log-interpolated, not snapped to the nearest sample). The solver's honesty notes print right under the plot: what stayed open, which rails are AC ground. Design a filter in the calculator, then watch your actual schematic deliver it.
• The editor teaches its own gestures now. Three one-time hint chips hand new users the keys — double-click a block to see inside, right-click a pin to label its net, and 'wire something wrong on purpose — watch it get caught.' Each dismisses forever with one click. Also: pin hit-targets are twice as forgiving (the dots look the same, the clickable area doesn't), a design that outgrows its template name gets one gentle rename nudge, and findings that mention a derived net name ('vout#2') now tell you how to give that net a real one.
• The engine learned AC. Stage 3 of the analysis ladder: phasor steady-state analysis — the same exact-math solver, now with complex impedances at any frequency. Ask Sparky for the frequency response between two points of YOUR design and get the real H(jω): magnitude, phase, and the −3 dB corner of the filter you actually drew, not the one in the textbook. Same honesty charter as DC: R, C, and L are solved exactly, nonlinear parts stay out rather than being guessed at, and ideal rails are AC ground. Still not a simulator — still deterministic, explainable, and locatable.
• Version history. Every design now builds a timeline: automatic checkpoints as you edit (deduplicated — dragging blocks around isn't a new version), named snapshots on demand ('before PCB rework'), and loss-proof restore: restoring checkpoints your current state first and creates a new version pointing back at the one you restored, so history only ever grows. The History button lives next to Report and Netlist. Hobby keeps your latest 5 versions; Pro keeps deep history — the Pro card's oldest 'coming soon' is now just true.
• Faster first paint, friendlier phones. Fonts are now self-hosted (the old setup blocked the first paint behind a third-party font chain — the main mobile slowdown), the top nav works on narrow screens instead of clipping half its links, and the editor greets small screens honestly: it's a desktop tool, and it now says so and points phone visitors at the block library and calculators, which work great on mobile.
• A glossary that respects your time. Thirty terms — hysteresis, flyback diodes, Thévenin equivalents, power factor, E-series values, body diodes — each a short definition written by people who build, a working-engineer's 'in practice' paragraph, and links onward to the live circuit, calculator, or check that uses the idea. Browse at /glossary.
• Net labels — wire by name. Right-click any block terminal (or click its row in the card) and give it a label: every terminal carrying the same name is one net, no wire drawn. +5V and GND rails stop being spaghetti, the label names the net everywhere — checks, the netlist dialog, KiCad export — and labels survive save/reload like any wire. Sparky got the matching set_net_label tool. Also fixed: blocks whose own internals deliberately pass a rail through (USB-C's vbus→vout) no longer trip a false internal-short error on every placement — author ties are trusted; user mis-wires still fire.
• Every check rule is now documented. All 29 rules the engine can fire — over-voltage, rail budgets, diode PIV, USB inrush, I²C rise time, isolation bridging, the lot — each have a page explaining what the check examines, the physics of why it matters, and how to fix it. Every finding card in the editor now links to its rule's page ('about this check'), so the moment a check fires is the moment the explanation is one click away. Browse them all at /docs/checks.
• Li-ion charger schematics redrawn. The TP4056 block's drawing routed wires through the chip body and under its pins, and the expand-to-discrete view was worse: wires through transistor symbols, across the sense resistor, and — embarrassingly — the base-drive pull-up drawn connected upside-down (the netlist was always right; the picture lied). Every wire is now explicitly routed: clean entries, real junctions, crossings that look like crossings.
• Templates that actually template. The dashboard's 'Start something new' cards used to create an empty canvas wearing the template's name. Now each one seeds a real, wired, check-clean design from the block library: Power supply (entry → buck → LDO, an indicator on each rail), Buck converter, MCU board (regulated rail → micro → status LED), and Sensor front-end (thermistor → amplifier → filter → comparator → alert LED). Blank canvas still means blank. Design thumbnails got real too: cards now show your blocks at their actual positions with their actual wiring — your design's fingerprint, not a generic placeholder.
• Solver honesty fix. A block that declares its draw AND models it with real parts (an LED indicator's resistor) was counted twice — invisible behind a stiff source, but through a 10 k pull-up the phantom draw solved the net to nonsense. Internals that conduct now ARE the load; the declaration steps in only where they can't. Found by our own templates, fixed with a regression test. The 'LDO burns X W' recommendation also now uses your circuit's ACTUAL input rail and load instead of the part's worst-case datasheet numbers — a 5 V-fed LDO lighting an LED no longer gets accused of burning 4 W.
• New calculator: active filter designer. Pick an order (2–8), a cutoff, and low- or high-pass — and get the whole Butterworth filter as buildable cascaded Sallen-Key stages: each stage's pole Q, standard E-series component values, and — the honest part — the cutoff and Q those snapped parts actually deliver, recomputed per stage. Stages are ordered lowest-Q first (the way you should build them), odd orders get their real-pole RC stage, and orders 7–8 warn about the component spread that 4Q² demands.
• Report and Netlist are now in-editor dialogs. The toolbar buttons used to fire straight downloads — now Report opens the full design report as a readable document right in the editor (blocks, parts with their reasoning, limits, findings), and Netlist opens the whole stitched design as an interactive graph plus a net-by-net table. Both keep one-click export (Markdown / KiCad .net) in the dialog footer. Read first, download when you actually want the file.
• LEDs and diodes now solve. The DC solver models diodes, Schottkys, and LEDs with the textbook fixed-drop method — assume conducting, solve, flip any diode whose assumption broke, repeat until settled. Your LED indicator's series resistor now shows its REAL current ((5 V − 2 V)/330 Ω = 9.1 mA), reverse-biased diodes correctly block, and the forward voltage comes from the part's value when it parses (or honest defaults: 0.7 V silicon, 0.3 V Schottky, 2.0 V LED). Zeners and TVS stay out of the model on purpose — reverse breakdown deserves real treatment, not a guess.
• Standby draw — because 'off' never means zero. The new floor report answers the battery designer's most expensive question: what does this design pull when everything that can sleep is asleep? Dividers, pull-ups, and diode leakage have no off switch — they're solved exactly; blocks declare their sleep draws (iStandby) and anything undeclared is flagged as assumed-zero rather than guessed. Click a source net and the passport shows the floor — the demo's own buck shows the classic mistake: its feedback divider draws 102 µA forever, ten times the MCU's 10 µA sleep current. With a declared battery capacity you get the punchline directly: how long the cell survives the floor. Honest scope: logic-state draws and charging circuits are excluded — this is the minimum your design can never beat.
• Diode backflow, quantified. An off diode isn't a perfect wall: it withstands the reverse voltage (now checked against a declared PIV rating — 12 V across a 10 V diode is an error that says 'it will avalanche'), and it leaks. Declare the datasheet leakage (I_R at V_R) and the solver models it as the real resistance it is — so a 'blocking' diode on a battery shows its actual backwards drain: '~0.6 µA flows backwards anyway — a slow drain that never sleeps.' Nothing is guessed: no declaration, no claim.
• Thévenin from any net. Click a net and the passport shows what any load connected there would experience: 'Thévenin: 6.00 V · 5.0 kΩ' — the open-circuit voltage and output impedance, computed by probing the solved circuit with a test current. Ideal declared sources honestly read '≈0 Ω (ideal source)'. Sparky's new thevenin tool adds the Norton dual and the maximum-power-transfer figure. The circuits-course party trick, live on every design.

2026-06-11

• Blocks that prove themselves: a block can now declare its own expected operating points ("the feedback node sits at 1.02 V") and the solver verifies the claim on every single change — change a divider resistor and the block itself reports its spec broken, with the arithmetic. The buck converter ships with its first assert. Also new: terminal aliases (wiring REG1.gnd just works even when the block's terminal is gnd_in), declared part ratings (a 10 V cap on a 12 V node is now an error computed from the REAL solved voltage, not a guess), the net panel shows the solved voltage on every net, and Sparky gained a solve_dc tool — ask it what voltage is actually at a node and it answers from the matrix, not the vibes.
• A fab-grade bug found by the solver: two different nets that happened to derive the same name (two blocks both calling their output VOUT) would have been fused on KiCad netlist import — physically shorting them on your board. Flat net names are now always unique. The solver caught it because the same fusion made its matrix singular; honest math finds dishonest data.
• The engine solves now. Stage 1 of the analysis ladder is live: a DC operating-point solver (Modified Nodal Analysis — the node-voltage method from your circuits course, as code) runs over the flattened design on every change. What that buys today: every resistor's REAL current and dissipation — a 0603 quietly burning 1.4 W is now an error naming the part, with the arithmetic shown. The solver is honest to the bone: semiconductors and ICs are left open and it says so (bias networks around them solve correctly), a resistor with no value gets a 'can't solve this' finding instead of silence, and anything it can't compute is reported, never guessed. Closed-form linear algebra — still no simulation.
• Five more calculators — the circuits-course toolkit: current divider (the voltage divider's mirror image), delta ↔ wye conversion (the bridge-circuit unlock), LC resonance & reactance (with series/parallel L and C math), AC power & power factor (real/reactive/apparent, single and three phase, plus correction-capacitor sizing), and the AC induction motor (synchronous speed, slip, rotor frequency, shaft torque, efficiency). Ohm's law also gained a Joule's-law section — energy over time at the computed power. Fifteen calculators total.
• Motor winding & Kv calculator: Kv to torque (they're the same constant — Kt = 9.549/Kv), rewind turns scaling, wye/delta conversion, cogging-step arithmetic, and winding-wire math (AWG, parallel strands, phase resistance with the I²R loss at your current). Honest about its limits: it does the exact arithmetic around a winding, and tells you to consult a winding table for the layout itself.
• Inrush checking, the deterministic way: hang too much hard-attached bulk capacitance off a USB port and the checker now tells you — at plug-in, every bulk cap is a momentary near-short, and the USB spec allows only ~10 µF before inrush can brown-out or trip the host. The finding sums the actual caps inside your blocks, names each contributor, and suggests the fix (a soft-start / load switch). No simulation — declared-value arithmetic, like every other check.

2026-06-10

• Connector pins now mean something: double-click any placed connector (or right-click → Pin specs…) and declare what the outside world presents — or draws — at each pin: a name (VBAT, SDA), a net type, a direction, and voltage/current. A declared pin becomes a real terminal at the board edge, so every existing check works across it: a 12 V supply arriving on a header pin gets caught against a 5.5 V-max input, off-board loads count in the power budget, a hot wire into a ground pin flags as a short, and the net inherits the pin's name (VBUS) everywhere it's mentioned.
• Connectors that know their own pinout, out of the box: USB receptacles (C/A/Mini/Micro), the LiPo JST-PH, barrel jacks, and audio jacks ship with their inherent meanings built in — drop a USB-C and the engine already knows VBUS is 5 V power in at up to 3 A and GND is ground, zero clicks. Built-ins show greyed in the pin editor and any field can be overridden per instance.
• Contact ratings, enforced: every connector in the catalog now carries its family's per-contact current rating (JST-PH 2 A, 0.1" headers 3 A, screw terminals 10 A, USB-A 1.5 A…), and a new check compares the current actually flowing through each declared pin against it — pushing 4 A of load through a 2 A LiPo contact is an error that names the pin, with a warning band as you approach the limit.
• Connector cards show the declarations: pin rows on the canvas display the declared name color-coded by net type, plus the declared volts/amps — so a glance at the board edge tells you what comes in and goes out.
• The feature lists caught up with the engine: the pricing page now spells out what the checking engine actually catches — voltage propagation, budgets, isolation, signal integrity, connector ratings, wiring sanity — and that all of it is free. The in-app help and Sparky's reference got the same update.
• Sparky's toolbox caught up too: it can now declare connector pins (and does so proactively at power entry), set galvanic-isolation requirements (verified the moment it declares them), assign signal-integrity classes to nets, and run the what-if stress test — so asking it "can I run this from a 24 V brick?" gets arithmetic, not vibes.
• Signal integrity and galvanic isolation are now Pro analyses. The core checking engine — voltage propagation, current budgets, shorts, polarity, connector ratings, the stress test — stays free forever; the professional-grade declarations (SI classes, isolation guarantees) join Sparky and manufacturing export in Pro. The menu items remain visible to everyone, with a clear explanation of what they do.
• Manufacturing export now actually requires Pro (it was always meant to): the BOM CSV download and the routed-board .kicad_pcb export check your plan. Viewing the BOM, the Digi-Key cart, PCB editing/routing/DRC, the design JSON, and the KiCad netlist all stay free — your design is never locked in.
• Try Electrace without an account. The editor is no longer login-walled — open it cold and everything works: blocks, wiring, the full checking engine, the PCB editor. Your work saves to that browser, a banner says exactly that, and creating a free account imports it automatically. "Free, no card" now means what it says, from the very first click.
• Every reducible IC in the library now breaks into discrete: two new teardowns complete the set — the op-amp (the comparator's long-tailed pair grown up: a current-mirror load, a compensated gain stage, and a class-AB output — the 30 pF Miller cap is the entire difference between an op-amp and a comparator) and the Li-ion charger (a pass transistor with two referees: a 0.6 V sense resistor capping the current, and a zener + transistor tapering it at exactly 4.2 V). Ten ICs now open up; the other sixteen library blocks were already fully discrete.

2026-06-09

• Net labels: a block's internal schematic now has net labels / power flags (in the Power palette) — drop one on a pin and name it (+5V, +3V3, GND…), and every label, port, or power symbol with that same name is the same net, with no wire between them. So a row of bypass caps can fan out to a rail without a single wire crossing the whole row, and multiple ground symbols collapse to one ground — the way a real schematic tool works. Crucially, differently-named labels stay separate even when drawn collinear, so two rails laid out as one visual row don't short together.
• Clearer short detection: when a block's own internal wiring ties two incompatible terminals together (say a 5 V rail to a 3.3 V rail, or a rail to ground), the checker now flags the block that's internally shorted and names the two terminals — instead of blaming your top-level wiring — and it suppresses the cascade of phantom over-voltage / dueling-driver warnings that the one short was causing.
• Findings highlight where they are: a block with a live issue now lights up in its severity color — a red ring + glow for an error, amber for a warning — right on the canvas, and clicking a finding jumps to that block and highlights it. Inside a block, locating a problem pulses the affected part or wire in the same red/amber so you can see exactly what it's pointing at instead of hunting for it.
• Smoother dragging: moving blocks around the canvas no longer re-runs the full design analysis on every pixel — checks now re-run only when the circuit itself changes, so big designs drag noticeably smoother.
• No lost last edits: your work is now saved immediately when you close the tab or leave the editor — previously the very last moments of editing could miss the autosave window.
• Import feedback: importing a file that isn't a valid design now tells you so, instead of silently doing nothing.
• Undo correctness: undoing past a block edit no longer brings back the block's old terminal layout.
• Junction taps stay connected: a wire tapped onto another wire is now bound to it — drag the host wire's parts around or hit Align and the junction rides along, keeping the connection. Deleting the host wire leaves the tapped wire visibly floating instead of silently broken.
• Block cards tell you more at a glance: every block on the canvas now shows its declared-spec line (e.g. 9–18 V → 5 V · 3 A), a live status chip (green ● OK · amber ▲ warnings · red ⬣ errors, with counts) fed by the same checks as the Problems panel, and an IC / DISC tag so you can see which blocks are chip-based and which are fully discrete without opening them.
• Find blocks by spec, not name: the palette has a spec-search box — type the need (18V → 5V at 3A, 12 to 3.3v 500ma, or just buck) and it filters to blocks whose declared specs actually satisfy it. Matching is on authored numbers only — a block missing a declaration can't sneak in, and every match can explain exactly why it fits. Sparky got the same power: ask it to "drop 18 V to 5 V at 3 A" and it searches by spec instead of guessing.
• Designs live in your account: signed-in designs now save to real cloud storage — your projects (schematic and board layout) follow you across devices, work you made before signing up is imported automatically on your next visit, and your browser stays a fast offline cache. Private designs are enforced down at the database layer, not just in the UI.
• Forgot your password? The login page's Forgot? link now works — request a reset email and choose a new password.
• Parts-basics overhaul, round one: twenty part types that quietly fell back to a generic chip footprint on the PCB (thermistors, fuses, tact switches, buzzers, triacs, JFETs, photo-devices, test points…) now land physically correct patterns — and the connector catalog gains the hobbyist staples: JST-PH (the LiPo standard), JST-XH in 2/3/4-pin, and a 3.5 mm audio jack, all with true-pitch land patterns.
• Signal integrity, declared and enforced: right-click any wire → Signal class… and say what the net IS — RS-485, CAN, I2C at 100/400 kHz, a USB pair, or just a fast edge. The checker then enforces what that class physically requires: a missing 120 Ω termination on a declared bus gets caught (it scans for the actual resistor bridging the pair), I2C rise time is computed from your pull-ups and bus size with the fix in the message ('drop the pull-ups to ≤8.8k'), and on the PCB, electrically-long traces and mismatched pair lengths show up in DRC with the limits derived from the class's edge rate.
• Galvanic isolation, as a standing guarantee: right-click any block → Isolation… → choose which blocks it must share NO conductive path with (or 'all others'). The checker re-verifies on every single change, honouring true barriers (an optocoupler's two sides only exchange light) — and the moment anything bridges the gap, usually a carelessly shared ground, the finding names the exact net that did it. Declare it once; never accidentally break it again.
• Four new checks, built on the propagation engine: a signal output driving more load than it's rated for (the classic 'three LEDs on one GPIO'), a power source wired straight to ground (a short, not a circuit), brown-out detection (a rail that can sag below an input's declared minimum — works at nominal, dies at the bottom of the range), and real regulator dissipation — the LDO-as-space-heater catch, computed from what's actually connected, with a needs-a-heatsink error tier.
• The checker got fundamentally smarter — DC propagation: voltages now flow THROUGH chips (a 555 powered from 18 V swings its output at 18 V — and the checker now catches that hitting a 5.5 V-max input downstream), and current draw flows back UP (a rail now sees the chip plus everything the chip drives, so the power budget reads true). The stress test uses it too: 'holds at 24 V' is now impossible to see when a 15 V-max part sits on the input rail — it names the first part to die. And the checks panel can no longer stay pinned to a deleted block.
• Four more calculators — parallel resistors (any number, plus 'what do I parallel with what's in my drawer?'), 555 timer astable (frequency, duty, HIGH/LOW times — with the why-never-50% answer), RC filter cutoff (and what −3 dB actually means), and Ohm's law + power (the wattage number that decides whether your resistor survives). Nine calculators total at /calculators.
• New block: Optocoupler Input — isolate a 24 V industrial signal from your microcontroller with nothing but light crossing the barrier. Covers CTR aging (design for end-of-life, not the datasheet's sunny day), why these are slow, the inverted-output gotcha, and the reverse-protection diode field wiring will eventually need. And open the chip: the simplest teardown in the library — an LED staring at a phototransistor across a deliberate gap.
• Sparky remembers long projects without the bill: conversations now compact — older turns fold into a rolling summary (what you're building, decisions made, refs and values chosen) while recent turns stay verbatim. Week-long design conversations keep their memory at a fraction of the tokens, and replies stay just as sharp.
• Report a bug — with the context already attached: the editor now keeps a short replay buffer of editor actions on your device (like a game recorder — local only, never synced). Hit ⚑ Report a bug, and a dialog shows exactly what would be sent — your description, the recent action log (viewable), optionally a design snapshot — and sends only when you confirm. The capture toggle is gone; there's nothing to configure and nothing leaves your machine without you pressing Send.
• Schematics you can actually read: block pages, calculator pages, share pages, and the in-editor teardown view now render schematics at their natural size (scaled to fit, capped) instead of squeezing a full 8-pin design into a thumbnail. The 555's internals are finally legible without squinting.
• Pro has a price: $9/month, early-adopter rate, right on the pricing page — no more mystery. Yearly billing is in the upgrade flow (best value), and a new FAQ spells out the cancel policy: Pro runs out what you paid for and your designs are never deleted.
• The landing page now shows a catch: the hero demo's linter flags a real mistake — a 24 V brick feeding an 18 V-max regulator — with the offending net highlighted in red. Watching the checker catch something IS the product; now the first screen shows it.
• Sparky is on the landing page — with the honest argument: AI copilots guess because nothing checks them; Sparky's work goes through the same deterministic linter as yours. Every wire resolved, every budget recomputed, every claim checkable.
• Circuit calculators: five free calculators — LED resistor, voltage divider (with reverse mode), crystal load caps, NTC thermistor tables, and op-amp gain — each showing the REAL schematic it computes, with standard E-series values, the gotchas, and a one-click path into the editor. Find them in the footer or at /calculators.
• Four new blocks (Wave 3): the non-inverting op-amp amplifier (the two-resistors-make-precision circuit, with the clipping and single-supply gotchas), crystal + load caps (the load-capacitance math everyone gets wrong, and why placement is the engineering), TL431 voltage reference (the most-shipped secret IC in electronics), and NTC temperature sensing (with the self-heating and ratiometric notes). Library: 25 blocks.
• The TL431 opens up too: its discrete equivalent shows the three things inside the three-pin package — reference, error amp, shunt transistor — and the error amp nests into the comparator teardown. Seven ICs in the library now break into discrete.
• The buck and boost open up: both switching regulators gain discrete equivalents — honest hysteretic (bang-bang) controllers: a comparator watching the feedback pin against a reference, flipping the power switch. And because that comparator is itself breakable, the buck is now a triple-nested teardown: buck → controller internals → comparator → transistor pair. Six ICs in the library now open up.
• Everything in your account now persists: your custom blocks, block edits, settings, and project list now live in real cloud storage alongside your designs — they follow you across devices and survive anything. (Anonymous/local use keeps working from your browser.)
• Honest legal pages: the Privacy and Terms pages got a full rewrite to match today's product — accounts, design visibility, billing via Stripe, the assistant's data path, affiliate links, and exactly what stays local-only. Plain language, no boilerplate fog.
• Sparky says so when it's out of fuel: if our AI capacity is exhausted (it happens during development), Sparky now says exactly that instead of a vague error — your design is untouched, just try again later.
• Faster discovery: the site now publishes an llms.txt index (so AI assistants citing sources for circuit questions can find and quote the block explainers) and supports IndexNow for near-instant indexing on Bing-family search engines.
• Honest comparisons: new /vs pages compare Electrace with Fritzing, Tinkercad Circuits, EasyEDA, and KiCad — and every one names what the OTHER tool does better and when you should pick it instead. KiCad's page isn't even a versus: it's the on-ramp story, because the export button is the whole point.
• Findable: a site-wide SEO pass — every published URL (canonicals, sitemap, robots) now points at the real host instead of a redirect, the landing page declares itself properly to search engines (organization, site, and free-app structured data), the pricing FAQ is machine-readable, block pages carry breadcrumbs, and every block page now generates its own social card (title, framing, declared specs) so shared links look right everywhere. Unlisted shared designs stay out of search indexes — public ones are in.
• Comparator (with hysteresis) joins the library — the Schmitt trigger built from parts you can point at, teaching the two classic comparator bugs (the missing pull-up on an open-collector output, and chattering at the threshold without hysteresis). Its discrete equivalent is the long-tailed pair — two matched transistors weighing the inputs against each other, the front door of every comparator and op-amp ever made. And because the 555's internal comparators are the same part, teardowns now nest: open the 555, then open one of ITS comparators.
• The 555 arrives — and opens up: a new 555 Timer (astable) block (the two-resistors-one-cap oscillator, with the frequency and duty formulas and the floating-RST gotcha), and the most famous teardown in electronics as its discrete equivalent: the three 5k resistors the chip is named for, the two comparators they feed, the SR latch they fight over, and the discharge switch — with CV honestly exposed as the 2/3-divider tap it really is.
• The H-bridge opens up: the motor driver gains its discrete equivalent — select the chip and break it into the four FETs it really is (two totem-pole pairs, the same structure as a CMOS gate, sized for amps), with the honest note about shoot-through and what a real driver IC adds. It's drawn on the block's public page too, under Inside the chip.
• Pad net passport: click any pad on the board and the properties panel now shows everything riding on that net — every pad on it (click one to jump straight there), how many millimetres of copper are routed, and in how many traces. The PCB answer to the schematic's net inspector.
• PCB editor catches up: components can no longer overlap — dragging slides a part along its neighbour (same feel as the schematic canvas), rotations that would land on another part are refused, and arrow keys nudge the selected part (0.5 mm, Shift for 2.5 mm). Also fixed: rotating a part you'd never dragged used to teleport it to the board origin — it now rotates in place.
• Zooming fixed in Firefox (both editors): wheel deltas are now normalized across browsers — Firefox reports scroll in lines (and fractional pixels), which made zoom crawl at ~2% per notch and sometimes routed the wheel to pan instead. Schematic and PCB editors both behave the same now.
• Connectors on the full schematic: the whole-design sheet now shows every board connector as its own region — each pin with its net flag (and an honest dashed open for unwired pins). A schematic without its headers was missing exactly what a reviewer checks first.
• Long labels behave now: part values longer than a real value (Sparky liked writing datasheet sentences into them) are clamped with an ellipsis on the drawing, the IEC inside-the-box value placement only fires when the text truly fits the drawn box (no more wire strike-throughs), and the full-schematic sheet's titles count as obstacles so labels stop parking on them. Sparky is also now told that a value is a VALUE ("100n", "SMBJ18A") — explanations belong in chat, not on the sheet.
• Full schematic view: a Schematic button in the editor opens the whole design as one traditional schematic sheet — every block's real internals drawn side by side in titled regions, with net-name flags at each port (same name = same net, the way multi-sheet schematics have always worked). Hover any part for its authored why, double-click a block to edit it, and Download SVG for a clean handoff/review drawing.
• The net graph never lies anymore: connector pins now appear as members of their nets everywhere — the net inspector gains a Board I/O section showing exactly where a net leaves the board, and Sparky's net listings include them too (they were silently dropped before). And a stale wire no longer kills the analysis: a wire whose endpoint vanished (say a block was re-authored) used to crash the checks into one cryptic error — now everything else still resolves and the stale wire becomes a precise finding that names the endpoint's actual valid terminals. Sparky also reports an explicit terminal diff (added / removed / reconnected / orphaned) whenever it re-draws a block.
• Sparky replies land in the right chat: a reply that finished after you switched threads (or drilled in/out of a block schematic mid-response) used to land in whichever conversation was active at that moment — looking like it vanished. Every run is now bound to the conversation it started in.
• Six more library blocks — the GPIO-to-world set: MOSFET Switch (the 'drive a 12 V thing from a 3.3 V pin' answer, with the logic-level-gate gotcha), Relay Driver (starring the famous flyback diode), H-Bridge Motor Driver (how reversing a motor actually works, and why you size for stall), I2C Level Shifter (the two-FET BSS138 trick, explained properly), Debounced Button (why one press reads as twenty, and the RC fix), and LED Current Sink (a real two-transistor current regulator — your first taste of how every linear regulator works inside). The library is now 19 blocks, every one with its schematic, whys, declared specs, and failure-mode notes.
• Symbol bodies are opaque: a wire passing behind a part is now masked by the body instead of showing through it — a line through a symbol used to read as a connection that doesn't exist. Pins and their stubs stay clear.
• Wires are always clickable: a wire squeezed between two close parts used to be unselectable — the parts' grab areas sat on top of it. Clicks landing on the line itself now always reach the wire (and clicks near a pin still go to the pin).
• Symbols can't overlap anymore: there's never a reason for two parts to sit on top of each other, so now they can't — dragging slides a part along a neighbour instead of through it, rotating into a neighbour is refused, nudges stop at contact, and newly placed or duplicated parts walk to the nearest clear spot.
• Labels stopped fighting the drawing: schematic ref/value labels are now collision-avoided — they never sit on symbols, wires, or each other. Chips and ICs carry their label on the body; in IEC mode a horizontal resistor's value goes inside the box (that's what the box is for); long labels wrap into a neat stack instead of running over neighbours; and when a crowded area pushes a label away from its part, a light dotted leader line points back to it. PCB silkscreen refs do the same dance — they slide above/below/beside their part to the first clear spot instead of stamping over the neighbour.
• Terminals always face their wire: port symbols now auto-orient toward their connection — place one backwards (or let Sparky do it) and it snaps to face the wire, in the editor and every preview.
• Six new library blocks — the power spine: USB-C 5V Input (the CC-resistor handshake everyone forgets), Reverse-Polarity Protection (the P-FET trick, explained), Boost Converter, Li-ion Charger (CC/CV, with the charge-current formula), Input Protection (fuse + TVS crowbar pairing), and Voltage Divider (with the two loading gotchas). Every one ships with its drawn schematic, per-part whys, declared specs the checker can verify, and a failure-mode note — and each has its own explainer page in the library.
• Power Entry fix: the reverse-polarity FET inside Power Entry was drawn input-to-source; correct is input-to-drain (otherwise a reversed supply sneaks through the body diode). Fixed, and the explainer now teaches why.
• Block pages got a big upgrade: every public block page now shows the actual schematic, an "Inside the chip" section that draws out the discrete equivalent where one exists (the same view as the editor's break-into-discrete), related blocks, and a try-it call-to-action. The library search now also takes specs — type 18V → 5V at 3A and get the blocks that can do it.
• Buy your BOM: every line in the BOM panel now has a buy ↗ link (by part number when declared, value + package otherwise), a CSV download, and a one-click Send to Digi-Key that drops every line with a part number straight into a Digi-Key list/cart — refs and quantities included. Links never influence which parts a block recommends.
• Share your designs: a Share button in the editor lets you choose who can see a design — Public (anyone can find it), Unlisted (anyone with the link), or Private (only you — part of Pro) — and copy a share link. The shared page is a clean read-only view: the blocks with their specs and internals, live check status, and an "Open a copy in Electrace" button so anyone can fork a shared design into their own workspace.

2026-06-08

• Settings: a proper settings page (from the account menu) to change your theme, accent, ANSI/IEC symbols, role, and local-capture preference — and edit your display name — any time after onboarding.
• Block library: the library index is now searchable and filterable by category.
• Schematic export: export a KiCad netlist (.net) of the whole stitched design straight from the editor toolbar (alongside Export and Report).
• Polish: friendly 404 and error pages, and real Privacy and Terms pages (linked from sign-up and the footer).
• Landing page: a cleaner, roomier hero animation — the two-block preview is properly spaced with port-to-port wires, terminal labels no longer overlap the blocks, and the hover-to-explain tooltip and lint bubble sit clear of everything.
• Site look: a subtle schematic dot-grid + ambient glow backdrop across the pages, so the background has a bit more depth instead of reading flat.
• Themed dialogs & right-click menus: the browser's plain prompt/confirm boxes are replaced with in-app themed dialogs (Escape/Enter, click-away to cancel). Right-click now opens a themed menu — on a block (open · duplicate · delete), on empty canvas (fit to view · clear selection), and on a dashboard design (open · star · rename · delete).
• Dashboard: each design now shows its lint status at a glance (Ready / N issues / N warnings), an Open issues total across your designs, sort (last edited / name / issues) and a grid ↔ list toggle, plus starring designs with a working Starred filter (and a Drafts view for empty boards).
• Hover-to-explain: hover any block on the canvas to get a quick tooltip — its spec, inputs/outputs, what parts are folded inside, and a key limit note — the same at-a-glance read the home page shows off.
• QFP blocks: pin labels on big (QFP-style) chips no longer overflow off the block — top/bottom labels now read down/up into the chip and every label is clamped to stay on-body.
• Brand: the Electrace logo mark — the circuit-C with a resistor trace — now sits beside the wordmark in the nav, footer, sign-in, and onboarding, and shows up as the browser favicon (themed to the page).
• Wire-to-wire junctions: in a block's internal schematic you can now end a wire on any point along an existing wire — a junction tap — instead of only pin-to-pin. The two are electrically joined (a junction dot marks the tap), so you can branch a net without routing all the way back to a pin.
• Footprint imports: the PCB editor can now import real KiCad .kicad_mod footprints — a single file or a whole library's worth at once — into a browsable footprint library (with a land-pattern preview of each), and assign one to a part: select a component, open Footprints, hit Use. The part's pins map onto the imported pads and the ratsnest follows; Use default reverts. Or hit Auto-match parts to assign library footprints to every part that matches by package (e.g. an 0805 cap → the library's C_0805) in one go. It's undoable and saved with your board.
• Pricing & tiers: a /pricing page with three tiers — Hobby (free, up to 10 designs), Pro (unlimited + private designs + manufacturing exports), and Team — a founding early-adopter note, and an FAQ. The dashboard shows your 10-design Hobby allowance with an upgrade prompt when you hit it. Linked from the nav, footer, and dashboard.
• Sparky is a Pro feature: the AI assistant (build/wire/explain) is now part of Pro — on the free Hobby plan the assistant pane shows an upgrade prompt. Everything else on Hobby is unchanged.
• Accounts: real cloud accounts — sign up with email + password (with email confirmation) or continue with GitHub / Google, and your session now follows you across devices instead of living only on one browser. The top bar shows Log in / Sign up when signed out and your avatar menu (your designs · settings · log out) when signed in. The app requires signing in — the editor, your dashboard, settings, and onboarding — while the marketing pages, block library, and help stay public.

2026-06-07

• Sparky (assistant): named Sparky ✨ with a friendlier face; opens into a collapsible side pane over the canvas (was a small popup); multiple conversations — new / switch / delete, each named from its first message and saved; replies render as markdown (tables, lists, code); shows live progress while it works instead of a static typing indicator; for a big multi-block build, Sparky fans the work out to its sparks and builds blocks in parallel, then places, wires, and reviews them; bias-to-action — finishes obvious steps instead of asking permission; can answer questions about Electrace itself + what's new; reads a block's details, sets values without re-authoring, exposes chip pins as a header, authors discrete/passive parts, places connectors, and reads power budgets.
• Blocks & authoring: a block is a functional subcircuit (multiple parts folded in), not one-part-per-block; re-authoring auto-reconnects renamed pins instead of orphaning wires; shared-value guardrail warns when one shared block can't carry per-instance values; values are first-class and editable.
• Library: relay variants (SPST / DPDT / solid-state); Mini-USB-B and Micro-USB-B connectors; connectors are placeable by the assistant.
• Checks & analysis: acknowledge a correct-but-noisy finding so it mutes with a reason (and grouped acknowledgements now mute every matching pin); a connector-capacity note when a header is maxed; power budgets surfaced (draw vs capacity, headroom); the findings panel and help now say plainly that checks are structural, not a simulation — clean = sane, not validated.
• Declare loads & sources from the UI: power/rail terminals now take a voltage + current in the block form and the right-hand inspector, so a source or static load shows up in the budget (instead of reading 0 W).
• Appearance: three themes — Light / Mid / Dark (Mid default) — from a selector, and the editor themes too; user-assignable glyph colors per block; an accent color you can pick.
• Onboarding: a first-run welcome wizard — pick your role, choose ANSI vs IEC symbols (a teaching picker that shows a resistor both ways), and your theme + accent — all applied live as you pick, then it opens a sample design to explore.
• Dashboard: the projects home is now a real dashboard — a workspace sidebar, jump-back-in recents, start-from-a-template cards, and a searchable design grid with live thumbnails + block counts (and a friendly empty state).
• Account pages: login / sign-up screens (GitHub / Google + email, split-layout with a product showcase).
• Landing page: a real home page — an animated hero with a live product-window preview (floating window, mini block schematics, a hover-to-explain cursor, a lint bubble), how-it-works, the see-inside transparency story, typed-nets, why-Electrace, the design → PCB → build path, scroll-reveal sections, and a start-free CTA.
• PCB editor: connectors now land on the board with real footprints (a 2×20 header is a proper 2-row grid, not a 100 mm row) and the ratsnest connects them; size-aware auto-placement so big parts don't overlap; faster zoom; authored chips land their real package (e.g. QFP-32 with all 32 pads).
• Site: a Help & Changelog page; social-share metadata (OpenGraph/Twitter card), sitemap + robots for the public block pages.
• Fixes: assistant reply truncation; authored blocks now reach the BOM/analyzer; light-mode contrast (white text/symbols on light); theme load flash + hydration warning.

2026-06-06

• Connectors: added as a first-class concept — place them on the canvas and drag a block terminal onto a connector pin to dock it as board-edge I/O.
• Blocks: edit a user block after creating it; expose a chip's pins as block terminals one at a time (as needed); QFP-style rendering for high-pin blocks; the assistant can author a block's internal schematic with a real chip (so it hits the BOM + footprints, not a hollow shell).
• Palette: reorganized into a 2-wide grid with collapsible My blocks / Library / Connectors sections; drag blocks/connectors straight onto the canvas.
• Fixes: duplicate-terminal canvas crash; block persistence across refresh; live-edit refresh; orphan ports; net-markers wrongly becoming duplicate PCB components.

Foundations — The core idea

• Block-based, strictly-typed schematic design — wire typed terminals (power / rail / signal / gnd, in / out); the type system catches the dumb-but-deadly mistakes.
• Live deterministic linting — open nets, two drivers fighting, undriven rails, over-current/voltage, polarity, empty blocks — without SPICE.
• BOM from the real parts inside your blocks, and a PCB view (footprints, ratsnest, routing, DRC, KiCad export).
• Transparent — every block can be cracked open to its real chip, footprint, and schematic; nothing hidden behind a magic box.