← Block library

Reverse-Polarity Protection

@electrace/reverse-polarity-protection@1.0.0 · CC-BY-4.0
vin 3–24 Viout_max 5 A
The actual schematic inside this block — every part is explained below.

Reverse-Polarity Protection

One transistor that makes "I plugged the battery in backwards" a non-event instead of a dead board — without the ~0.6 V (and the heat) a series diode would cost you.

The trick is a P-channel MOSFET used backwards from how you'd expect, with the input on its drain:

  1. Power-up (correct polarity): current can't flow through the channel yet (it's off), but the FET's built-in body diode points the right way — the output rises to about Vin − 0.6 V.
  2. The channel takes over: the source is now near Vin and the gate is held at ground by R1, so Vgs ≈ −Vin — far past the turn-on threshold. The channel switches fully on and shorts out its own body diode. Drop across the block: just Rds(on) × I, millivolts.
  3. Reversed input: the body diode points the wrong way (blocked), and the source never rises so Vgs stays ≈ 0 (channel off). Nothing conducts. Your board never knows.

D1 (12 V zener) clamps the gate-source voltage on higher-voltage rails — gate oxide typically dies at ±20 V, and without the clamp a 24 V input would apply all 24 V across it.

Exposes: vin (3–24 V), vout (same rail, protected, up to 5 A), gnd.

⚠ The one wiring mistake that ruins it: input on the source instead of the drain. It appears to work on the bench — until someone actually reverses the supply and the body diode conducts the wrong way. Drain in, source out, gate to ground.

Exposed nets

vinin · power · 3–24 V
gndin · gnd
voutout · power · 3–24 V

Inside this block

Q1
p-fet
the pass element — its body diode conducts at power-up, then the channel turns on and shorts the diode drop to ~0 V
R1
100k
gate pulldown — holds the gate at ground so the channel turns on (Vgs ≈ −Vin)
D1
12V
clamps Vgs so a high input can't punch through the FET's gate oxide

Limits & gotchas

vin.max 24VD1 (12 V zener) clamps the gate-source voltage — most FETs die at ±20 V Vgs, so above ~12 V in, the clamp is what's keeping Q1 alive. Don't remove it on a >12 V rail.
vin.min 3VBelow ~3 V there isn't enough Vgs to fully turn the FET on — it limps along on its body diode and burns the ~0.6 V you were trying to save.
Use this block in a real design
Drop it on a canvas, wire it up, and watch the live checks — free, no card.
Start designing →
This page is generated from the block's source — the same content powers the editor's explanations and live checks.