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555 timer calculator

Frequency, duty cycle, and HIGH/LOW times for the astable 555 — from Ra, Rb, and C.

Astable (free-running) mode. Keep Ra ≥ 1k so pin 7 isn't asked to short the supply, and C ≥ 100 pF so strays don't dominate.

Frequency1.44 / ((Ra + 2Rb) · C)1.385 kHz
Duty cycle (HIGH share)always > 50% in this topology54.8%
HIGH time0.693 · (Ra + Rb) · C395 µs
LOW time0.693 · Rb · C325.7 µs
With these parts10 kΩ + 47 kΩ + 10 nF
NE555

How it works

The 555 bounces its capacitor between ⅓ and ⅔ of VCC, forever. Charge runs through Ra + Rb (output HIGH), discharge through Rb alone into pin 7 (output LOW). One RC time constant per half, ln(2) each: f ≈ 1.44 / ((Ra + 2Rb) · C).

Common questions

Why can't this circuit do 50% duty cycle?

The capacitor charges through Ra + Rb but discharges through Rb only, so the HIGH half is always longer. Get close to 50% by making Rb much larger than Ra — or hang a diode across Rb so charge bypasses it, the classic mod.

What values are safe for Ra, Rb, and C?

Keep Ra ≥ 1k (pin 7 shorts Ra to ground every cycle — too small cooks the chip), both resistors under ~10M (leakage territory), and C ≥ 100 pF (below that, strays and chip capacitance dominate and the math drifts).

Why is my real frequency off from the calculation?

Capacitor tolerance, mostly — ceramics are ±10–20% and electrolytics worse. The resistor formula is honest; the cap rarely is. For frequencies that matter, use a film cap (±5%) or trim with Rb.

Design it in the editor — freeLive electrical checks, automatic BOM, KiCad export.