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I2C level shifter

@electrace/i2c-level-shifter@1.0.0 · CC-BY-4.0
vlv 3.3 Vvhv 5 V
The actual schematic inside this block — every part is explained below.

I2C Level Shifter

Lets a 3.3 V brain talk to 5 V parts on the same I2C bus — in both directions, with two tiny MOSFETs (the classic BSS138 circuit from NXP's app note).

I2C makes this possible because nobody ever drives a line high — devices only pull lines low, and resistors pull them up. So shifting levels just means: let a LOW cross the fence, in either direction, and let each side idle at its own voltage.

Per line (SDA shown; SCL is identical):

  • Idle: nothing pulls. Each side floats up its own pull-up — 3.3 V on the left of Q1, 5 V on the right. The FET's gate sits at 3.3 V, source at 3.3 V → Vgs = 0 → off. The two sides coexist at different voltages, connected but not fighting.
  • Low side pulls low: Q1's source drops, Vgs rises → the channel turns on and drags the 5 V side down too.
  • High side pulls low: Q1's body diode conducts first, dipping the source; that gives Vgs, the channel turns on and finishes the job.

A LOW always crosses; a HIGH is each side's own business. That's the entire trick.

Exposes: vlv/vhv (the two supply rails), sda_lv/scl_lv (3.3 V side), sda_hv/scl_hv (5 V side).

⚠ Don't stack this onto a bus that already has pull-ups on both sides — total pull-up resistance in parallel can get too strong for devices to pull low. Count ALL the pull-ups on each segment (many breakout boards sneak their own in).

Exposed nets

vlvin · power · 3.3 V
vhvin · power · 5 V
sda_lvin · signal
scl_lvin · signal
sda_hvout · signal
scl_hvout · signal

Inside this block

Q1
bss138
SDA pass FET — gate at 3.3 V: either side pulling low turns it (or its body diode) on, so the LOW crosses; idle lines float HIGH on their own pull-ups
Q2
bss138
SCL pass FET — same trick for the clock line
R1
10k
SDA pull-up, 3.3 V side
R2
10k
SDA pull-up, 5 V side
R3
10k
SCL pull-up, 3.3 V side
R4
10k
SCL pull-up, 5 V side

Limits & gotchas

speed.note 0Fine for 100/400 kHz I2C. The FETs + pull-ups round off edges; at 1 MHz+ (or long wires) drop the pull-ups to 2.2k and keep the bus short.
direction.note 0This circuit is BIDIRECTIONAL — both sides can pull the line low and the other side sees it. The in/out roles here are just naming; don't add a second shifter 'for the other direction'.
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